Method of forming a dual damascene structure on a

专利名称：Method of forming a dual damascene

structure on a semiconductor wafer

发明人：Yeong-Chih Lai申请号：US09/414895申请日：19991008公开号：US06103619A公开日：20000815

摘要：The present invention provides a method of forming a dual damascene

structure on a semiconductor wafer. The semiconductor wafer comprises a substrate, anda first silicon oxide layer, a silicon nitride layer, a second silicon oxide layer and aphotoresist layer sequentially formed on the substrate. A dry-etching process isperformed first to vertically remove a specific portion of the second silicon oxide layerdown to the silicon nitride layer so as to form a hole. Then the photoresist layer isremoved and the portion of the silicon nitride layer positioned under the hole is removedusing a phosphoric acid solution. A lithographic process is then performed to form aphotoresist layer on the second silicon oxide layer, the photoresist layer comprising aline- shaped opening positioned above the hole with a width larger than the diameter ofthe hole. Then an etching process is performed along the line- shaped opening tovertically remove the second silicon oxide layer and the first silicon oxide layer. Thephotoresist layer is then removed completely. Finally, a metallic layer is deposited and aCMP process is performed to form a conductive wire coupled with the via plug on thesemiconductor wafer.

申请人：UNITED MICROELECTRONICS CORP.

代理人：Winston Hsu

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