Vertical Power MOSFET and Methods for Forming the

专利名称：Vertical Power MOSFET and Methods for

Forming the Same

发明人：Po-Chih Su,Hsueh-Liang Chou,Ruey-Hsin

Liu,Chun-Wai Ng

申请号：US13486768申请日：20120601

公开号：US20130320431A1公开日：20131205

专利附图：

摘要：A device includes a semiconductor region in a semiconductor chip, a gatedielectric layer over the semiconductor region, and a gate electrode over the gate

dielectric. A drain region is disposed at a top surface of the semiconductor region andadjacent to the gate electrode. A gate spacer is on a sidewall of the gate electrode. Adielectric layer is disposed over the gate electrode and the gate spacer. A conductivefield plate is over the dielectric layer, wherein the conductive field plate has a portion ona drain side of the gate electrode. A deep metal via is disposed in the semiconductorregion. A source electrode is underlying the semiconductor region, wherein the sourceelectrode is electrically shorted to the conductive field plate through the deep metal via.

申请人：Po-Chih Su,Hsueh-Liang Chou,Ruey-Hsin Liu,Chun-Wai Ng

地址：New Taipei City TW,Jhubei City TW,Hsin-Chu TW,Hsin-Chu TW

国籍：TW,TW,TW,TW

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