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BUK9277-55A,118;中文规格书,Datasheet资料

2022-02-24 来源:步旅网
DPAKBUK9277-55A

N-channel TrenchMOS logic level FET

Rev. 3 — 17 May 2011

Product data sheet

1.Product profile

1.1General description

1.21.31.4http://oneic.com/

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic

package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications.

Features and benefits

󰂄Q101 compliant

󰂄Suitable for thermally demanding 󰂄Suitable for logic level gate drive environments due to 175 °C rating

sources

Applications

󰂄12 V and 24 V loads

󰂄Motors, lamps and solenoids

󰂄Automotive and general purpose power switching

Quick reference data

Table 1.Quick reference dataSymbolParameterConditions

MinTypMaxUnitVDSdrain-source Tj≥25°C; Tj≤175°C--55VvoltageIDdrain currentVGS=5V; Tmb=25°C; --18Asee Figure 1; see Figure 4Ptot

total power Tmb=25°C; see Figure 2

--51

W

dissipationStatic characteristicsRDSon

drain-source VGS=10V; ID=10A;Tj=25°C-5969mΩon-state resistance

VGS=4.5V; ID=10A; Tj=25°C--86mΩVGS=5V; ID=10A; Tj=25°C; -65

77

mΩ

see Figure 13

Avalanche ruggednessEDS(AL)S

non-repetitive ID=18A;Vsup≤55V; --33

mJ

drain-source

RGS=50Ω; VGS=5V; avalanche energy

Tj(init)=25°C; unclamped

NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

2.Pinning information

Table 2.Pin123mb

Pinning informationSymbolDescriptionGDSD

gatedrainsource

mounting base; connected to drain

21

3mb

DSimplified outlineGraphic symbol

Gmbb076SSOT428 (DPAK)

3.Ordering information

Table 3.

Ordering information

PackageName

BUK9277-55A

DPAK

Description

plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped)

VersionSOT428

Type number

BUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20112 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

4.Limiting values

Table 4.SymbolVDSVDGRVGSID

Limiting values

Parameter

drain-source voltagedrain-gate voltagegate-source voltagedrain current

Tmb=25°C; VGS=5V;seeFigure 1; see Figure 4

Tmb=100°C; VGS=5V; see Figure 1

IDMPtotTstgTjISISMEDS(AL)SEDS(AL)R

[1][2][3][4]

In accordance with the Absolute Maximum Rating System (IEC 60134).

Conditions

Tj≥25°C; Tj≤175°CRGS=20kΩ

Min---15-----55-55

Tmb=25°C

pulsed; tp≤10µs; Tmb=25°CID=18A; Vsup≤55V; RGS=50Ω; VGS=5V;Tj(init)=25°C; unclampedsee Figure 3

[1][2][3][4]

Max55551518137351175175187333-

UnitVVVAAAW°C°CAAmJJ

peak drain currenttotal power dissipationstorage temperaturejunction temperaturesource currentpeak source currentnon-repetitive drain-source avalanche energyrepetitive drain-source avalanche energy

Tmb=25°C; pulsed; tp≤10µs; see Figure 4

Tmb=25°C; see Figure 2

Source-drain diode

----

Avalanche ruggedness

Maximum value not quoted. Repetitive rating defined in avalanche rating figure.Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.Repetitive avalanche rating limited by an average junction temperature of 170 °C.Refer to application note AN10273 for further information.

BUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20113 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

20ID (A)15003aab510120Pder(%)8003aa16104050050100150Tmb (°C)2000050100150Tmb (°C)200Fig 1.Continuous drain current as a function of mounting base temperature 102IAL(A) 10Fig 2.Normalized total power dissipation as a function of mounting base temperature 003aab531(1)(2) 1(3)10-110-210-310-210-1 1t (ms) 10ALFig 3.Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche timeBUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20114 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

102Limit RDSon = VDS / IDID (A) 10003aab51110 μs100 μs1 msDC10 ms100 ms 110-1 1 10VDS (V) 102Fig 4.Safe operating area; continuous and peak drain currents as a function of drain-source voltageBUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20115 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

5.Thermal characteristics

Table 5.SymbolRth(j-mb)Rth(j-a)

Thermal characteristicsParameter

thermal resistance from junction to mounting base

thermal resistance from junction to ambient

ConditionsMin-

Typ-71.4

Max2.93-

UnitK/WK/W

see Figure 5-

10Zth(j-mb)(K/W)δ = 0.51 0.2 0.1 0.05 0.0210−1 single shottpP03ne00δ =tpTtT10−210−610−510−410−310−210−1tp (s)1Fig 5.Transient thermal impedance from junction to mounting base as a function of pulse durationBUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20116 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

6.Characteristics

Table 6.SymbolV(BR)DSSVGS(th)

Characteristics

Parameter

drain-source breakdown voltage

Conditions

ID=0.25mA;VGS=0V; Tj=25°CID=0.25mA;VGS=0V; Tj=-55°C

Min5550-10.5--------Typ---1.5--0.052259--65

Max--2.32-50010100100698615477

UnitVVVVVµAµAnAnAmΩmΩmΩmΩ

Static characteristics

gate-source threshold voltageID=1mA; VDS=VGS; Tj=-55°C;

see Figure 12

ID=1mA; VDS=VGS; Tj=25°C; see Figure 12

ID=1mA; VDS=VGS; Tj=175°C; see Figure 12

IDSSIGSSRDSon

drain leakage currentgate leakage currentdrain-source on-state resistance

VDS=55V;VGS=0V; Tj=175°CVDS=55V;VGS=0V; Tj=25°CVGS=15V;VDS=0V; Tj=25°CVGS=-15V;VDS=0V; Tj=25°CVGS=10V;ID=10A;Tj=25°CVGS=4.5V; ID=10A; Tj=25°CVGS=5V;ID=10A;Tj=175°C; see Figure 13

VGS=5V;ID=10A;Tj=25°C; see Figure 13

Dynamic characteristicsQG(tot)QGSQGDCissCossCrsstd(on)trtd(off)tfLDLS

total gate chargegate-source chargegate-drain chargeinput capacitanceoutput capacitance

reverse transfer capacitanceturn-on delay timerise time

turn-off delay timefall time

internal drain inductanceinternal source inductance

meausured from drain lead from package to centre of die; Tj=25°Cmeasured from source lead from package to source bond pad; Tj=25°C

IS=15A;VGS=0V; Tj=25°C; see Figure 16

IS=20A;dIS/dt=-100A/µs;

VGS=-10V;VDS=30V; Tj=25°CVDS=30V;RL=1.2Ω; VGS=5V; RG(ext)=10Ω; Tj=25°CVGS=0V;VDS=25V; f=1MHz; Tj=25°C;seeFigure 15ID=10A;VDS=44V;VGS=5V; see Figure 14

------------111.654409060104728332.57.5

---64311093------nCnCnCpFpFpFnsnsnsnsnHnH

Source-drain diodeVSDtrrQr

source-drain voltagereverse recovery timerecovered charge

---

0.853360

1.2--

VnsnC

BUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20117 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

60VGS (V) = 8ID(A)4003nd43120RDSon(mΩ)10003nd4210765804206030024682.210VDS (V)402468VGS (V)10Fig 6.Output characteristics: drain current as a function of drain-source voltage; typical values03aa36Fig 7.Drain-source on-state resistance as a function of gate-source voltage; typical values1503nd4010-1ID(A)10-2gfs(S)1010-3min10-4typmax510-510-6012VGS (V)3005101520ID (A)25Fig 8.Sub-threshold drain current as a function of gate-source voltageFig 9.Forward transconductance as a function of drain current; typical valuesBUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20118 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

25ID(A)2003nd415VGS(V)4VDD = 14(V)VDD = 44(V)03nd391531025Tj = 175 °C0012Tj = 25 °C34VGS (V)5100510QG (nC)15Fig 10.Transfer characteristics: drain current as a function of gate-source voltage; typical values2.5VGS(th)(V)2max03aa33Fig 11.Gate-source voltage as a function of turn-on gate charge; typical values180RDSon(mΩ)130003aab504VGS (V) = 33.43.8451.5typ1min800.50-6030060120Tj (°C)180010203040I (A)50DFig 12.Gate-source threshold voltage as a function of junction temperatureFig 13.Drain-source on-state resistance as a function of drain current; typical valuesBUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 20119 of 15

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NXP Semiconductors

BUK9277-55A

N-channel TrenchMOS logic level FET

5VGS(V)4VDS (V) = 14 3VDS (V) = 44003aab5081200C (pF)800Ciss003aab50624001Crss10-1 1 10 102VDS (V)Coss00510QG (nC)15010-2Fig 14.Gate-source voltage as a function of gate charge; typical valuesFig 15.Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values003aab50950IS (A)403020Tj = 175 °CTj = 25 °C1000.00.51.0VSD (V)1.5Fig 16.Source current as a function of source-drain voltage; typical valuesBUK9277-55AAll information provided in this document is subject to legal disclaimers.© NXP B.V. 2011. All rights reserved.

Product data sheetRev. 3 — 17 May 201110 of 15

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