Field effect transistor circuit arrangement

专利名称：Field effect transistor circuit arrangement发明人：Akira Honda申请号：US06/197099申请日：19810828公开号：US04394590A公开日：19830719

摘要：In a circuit arrangement having a plurality of field effect transistors which areconnected in series and operate simultaneously, the circuit arrangement is free fromrestriction of an operating frequency and it is not necessary to provide an individualpower source for gate biasing, so that the construction of the circuit arrangement issimplified and the cost is reduced.

A gate drive pulse is applied to the gate of the field effect transistor (Q2) on acommon potential point side. A parallel connection circuit having a first resistor (R3) and afirst capacitor (C3) is coupled between the gate of the other field effect transistor (Q1)and the common potential point side. A parallel connection circuit having a secondresistor (R4) and a second capacitor (C4) is coupled between the first electrode (e.g.drain) and the gate of the other field effect transistor. A capacitance of the first capacitoris larger than that of the second capacitor, so that the other field effect transistor issufficiently shifted to a conductive state when the gate drive pulse is applied to the fieldeffect transistor on the common potential side.

申请人：INTERNATIONAL RECTIFIER CORP. JAPAN LTD.

代理机构：Parkhurst & Oliff

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