www.ti.com THS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 200212ĆBIT 4 ANALOG INPUT, 6 MSPS, SIMULTANEOUS SAMPLINGANALOGĆTOĆDIGITAL CONVERTERFEATURESDSimultaneous Sampling of 4 Single-EndedSignals or 2 Differential Signals orCombination of Both68 dB at fI = 2 MHzto program the ADC into the desired mode. TheTHS1207 consists of four analog inputs, which aresampled simultaneously. These inputs can be selectedindividually and configured to single-ended ordifferential-inputs. Internal reference voltages for theADC (1.5 V and 3.5 V) are provided. An externalreference can also be chosen to suit the dc accuracyand temperature drift requirements of the application.The THS1207C is characterized for operation from 0°Cto 70°C, the THS1207I is characterized for operationfrom –40°C to 85°C.DA PACKAGE(TOP VIEW)DSignal-to-Noise and Distortion Ratio:DDDDDDDDDifferential Nonlinearity Error: ±1 LSBIntegral Nonlinearity Error: ±1.5 LSBAuto-Scan Mode for 2, 3, or 4 Inputs3-V or 5-V Digital Interface CompatibleLow Power: 216 mW Max at 5 VPower Down: 1 mW Max5-V Analog Single Supply OperationInternal Voltage References...50 PPM/°Cand ±5% AccuracyDGlueless DSP InterfaceDParallel µC/DSP InterfaceAPPLICATIONSDRadar ApplicationsDCommunicationsDControl ApplicationsDHigh-Speed DSP Front-EndDAutomotive ApplicationsDESCRIPTIONThe THS1207 is a CMOS, low-power, 12-bit, 6 MSPSanalog-to-digital converter (ADC). The speed,resolution, bandwidth, and single-supply operation aresuited for applications in radar, imaging, high-speedacquisition, and communications. A multistagepipelined architecture with output error correction logicprovides for no missing codes over the full operatingtemperature range. Internal control registers are usedD0D1D2D3D4D5BVDDBGNDD6D7D8D9D10/RA0D11/RA1CONV_CLKSYNC1234 567891011121314151632313029282726252423222120191817AINPAINMBINPBINMREFINREFOUTREFPREFMAGNDAVDDCS0CS1WR (R/W)RDDVDDDGNDORDERING INFORMATIONPACKAGED DEVICETA0°C to 70°C–40°C to 85°CTSSOP(DA)THS1207CDATHS1207IDAPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstrumentssemiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date. Productsconform to specifications per the terms of Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.Copyright 2002, Texas Instruments Incorporatedhttp://oneic.com/THS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002www.ti.comThese devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam duringstorage or handling to prevent electrostatic damage to the MOS gates.ABSOLUTE MAXIMUM RATINGSover operating free-air temperature range unless otherwise noted(1)UNITSSupply voltage rangeSuly voltage rangeAnalog input voltage rangeReference input voltageDigital input voltage rangeOperating virtual junction temperature range, TJTHS1207COperatingfreeairtemperaturerangeTAOperating free-air temperature range, TTHS1207IDGND to DVDDBGND to BVDDAGND to AVDD–0.3 V to 6.5 V–0.3 V to 6.5 V–0.3 V to 6.5 VAGND –0.3 V to AVDD + 1.5 V–0.3 V + AGND to AVDD + 0.3 V–0.3 V to BVDD/DVDD + 0.3 V–40°C to 150°C0°C to 70°C–40°C to 85°CStorage temperature range, Tstg–65°C to 150°CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds260°C(1)Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.RECOMMENDED OPERATING CONDITIONSPOWER SUPPLYSupply voltageygAVDDDVDDBVDDANALOG AND REFERENCE INPUTSAnalog input voltage in single-ended configurationCommon-mode input voltage VCM in differential configurationExternal reference voltage,VREFP (optional)External reference voltage, VREFM (optional)Input voltage difference, REFP – REFMDIGITAL INPUTSHigh-level input voltage, VHighlevelinputvoltageVIHLow-level input voltage, VLowlevelinputvoltageVILInput CONV_CLK frequencyCONV_CLK pulse duration, clock high, tw(CONV_CLKH)CONV_CLK pulse duration, clock low, tw(CONV_CLKL)Operating free-air temperature, TOperatingfreeairtemperatureTABVDD = 3.3 VBVDD = 5.25 VBVDD = 3.3 VBVDD = 5.25 VDVDD = 4.75 V to 5.25 VDVDD = 4.75 V to 5.25 VDVDD = 4.75 V to 5.25 VTHS1207CDATHS1207IDA0.180800–408383MINVREFM11.4MIN4.754.753NOM2.53.51.52MIN22.60.60.66500050007085NOMMAXNOM55MAX5.255.255.25MAXVREFP4AVDD–1.2UNITVVVVVUNITVVVVMHznsns°CVUNIT2http://oneic.com/www.ti.comTHS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002ELECTRICAL CHARACTERISTICS over recommended operating conditions, AVDD = DVDD = 5 V, BVDD = 3.3 V, VREWF = internal (unless otherwise noted)DIGITAL SPECIFICATIONSPARAMETERDigital inputsIIHIILHigh-level input currentLow-level input currentDVDD = digital inputsDigital input = 0 V–50–505IOH = –50 µAIOL = 50 µACS1 = DGND,BVDD–0.50.4–10530105050µAµApFVVµApFpFTEST CONDITIONSMINTYPMAXUNITCiInput capacitanceDigital outputsVOHVOLIOZCOCLHigh-level output voltageLow-level output voltageHigh-impedance-state output currentOutput capacitanceLoad capacitance at databus D0 – D11BVDD = 3.3 V, 5 V33V5VCS0 = DVDDELECTRICAL CHARACTERISTICS over recommended operating conditions, AVDD = DVDD = 5 V, BVDD = 3.3 V, fs = 6 MSPS, VREF = internal (unless otherwise noted)DC SPECIFICATIONSPARAMETERResolutionAccuracyIntegral nonlinearity, INLDifferential nonlinearity, DNLOffseterrorOffset errorGain errorAnalog inputInput capacitanceInput leakage currentInternal voltage referenceAccuracy, VREFPAccuracy, VREFMTemperature coefficientReference noiseAccuracy, REFOUTPower supplyIDDAIDDDIDDBAnalog supply currentDigital supply currentBuffer supply currentPower dissipationPower dissipation in power down with conversionclock inactiveAVDD = DVDD = 5 V, BVDD =3.3 VAVDD = DVDD = 5 V, BVDD = 3.3 VAVDD = DVDD = 5 V, BVDD = 3.3 VAVDD = DVDD = 5 V, BVDD = 3.3 VAVDD = DVDD = 5 V, BVDD = 3.3 V360.51.518640342160.25mAmAmAmWmW2.4753.31.43.51.5501002.52.5253.71.6VVPPM/°CµVVVAIN = VREFM to VREFP15±10pFµAAfter calibration in single-ended modeAfter calibration in differential mode–20–20202020±1.5±1LSBLSBLSBLSBLSBTEST CONDITIONSMIN12TYPMAXUNITBits3http://oneic.com/THS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002www.ti.comELECTRICAL CHARACTERISTICS over recommended operating conditions, VREF = internal, fs = 6 MSPS, fI = 2 MHz at –1 dBFS (unless otherwise noted)AC SPECIFICATIONS, AVDD = DVDD = 5 V, BVDD = 3.3 V, CL < 30 pFPARAMETERSINADSNRTHDENOBSFDRSignaltonoiseratio+distortionSignal-to-noise ratio + distortionSignaltonoiseratioSignal-to-noise ratioTotal harmonic distortionotalharmonicdistortionEffectivenumberofbitsEffective number of bitsSpuriousfreedynamicrangeSpurious free dynamic rangeTEST CONDITIONSDifferential modeSingle-ended modeDifferential modeSingle-ended modeDifferential modeSingle-ended modeDifferential modeSingle-ended modeDifferential modeSingle-ended mode10.17106765MIN63626464TYP63646968–70–6810.510.37169–67–64MAXUNITdBdBdBBitsdBAnalog InputFull-power bandwidth with a source impedance of 150 Ω indifferential configuration.Full-power bandwidth with a source impedance of 150 Ω insingle-ended configuration.Small-signal bandwidth with a source impedance of 150 Ω indifferential configuration.Small-signal bandwidth with a source impedance of 150 Ω insingle-ended configuration.96Fullscalesinewave–3 dBFull scale sinewave, 3dB5496100mVppsinewave–3 dB100 mVpp sinewave, 3dB54MHzMHzTIMING REQUIREMENTS AVDD = DVDD = 5 V, BVDD = 3.3 V, VREF = internal, CL < 30 pFPARAMETERtpipetsu(CONV_CLKL-READL)tsu(READH-CONV_CLKL)td(CONV_CLKL-SYNCL)td(CONV_CLKL-SYNCH)LatencySetup time, CONV_CLK low before CS validSetup time, CS invalid to CONV_CLK lowDelay time, CONV_CLK low to SYNC lowDelay time, CONV_CLK low to SYNC high10201010TEST CONDITIONSMINTYP5MAXUNITCONVCLKnsnsnsns4http://oneic.com/www.ti.comTHS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002Terminal FunctionsTERMINALNAMEAINPAINMBINPBINMAVDDAGNDBVDDBGNDCONV_CLKCS0CS1DGNDDVDDD0 – D9D10/RA0D11/RA1REFINREFPNO.3231302923247815222117181–6,9–1213142826I/OIIIIIIIIIIIIII/O/ZI/O/ZI/O/ZIIDESCRIPTIONAnalog input, single-ended or positive input of differential channel AAnalog input, single-ended or negative input of differential channel AAnalog input, single-ended or positive input of differential channel BAnalog input, single-ended or negative input of differential channel BAnalog supply voltageAnalog groundDigital supply voltage for bufferDigital ground for bufferDigital input. This input is the conversion clock input.Chip select input (active low)Chip select input (active high)Digital ground. Ground reference for digital circuitry.Digital supply voltageDigital input, output; D0 = LSBDigital input, output. The data line D10 is also used as an address line (RA0) for the control register. This isrequired for writing to the control register 0 and control register 1. See Table 7.Digital input, output (D11 = MSB). The data line D11 is also used as an address line (RA1) for the control register.This is required for writing to control register 0 and control register 1. See Table 7.Common-mode reference input for the analog input channels. It is recommended that this pin be connected to thereference output REFOUT.Reference input, requires a bypass capacitor of 10 µF to AGND in order to bypass the internal reference voltage.An external reference voltage at this input can be applied. This option can be programmed through controlregister 0. See Table 8.Reference input, requires a bypass capacitor of 10 µF to AGND in order to bypass the internal reference voltage.An external reference voltage at this input can be applied. This option can be programmed through controlregister 0. See Table 8.Analog fixed reference output voltage of 2.5 V. Sink and source capability of 250 µA. The reference outputrequires a capacitor of 10 µF to AGND for filtering and stability.The RD input is used only if the WR input is configured as a write only input. In this case, it is a digital input, activelow as a data read select from the processor. See timing section.Synchronization output. This signal indicates in a multichannel operation that data of channel A is brought to thedigital output and can therefore be used for synchronization.This input is programmable. It functions as a read-write input R/W and can also be configured as a write-onlyinput WR, which is active low and used as data write select from the processor. In this case, the RD input is usedas a read input from the processor. See timing section.REFM25IREFOUTRD(1)SYNCWR (R/W)(1)27191620OIOI(1)The start-conditions of RD and WR (R/W) are unknown. The first access to the ADC has to be a write access to initialize the ADC.5http://oneic.com/THS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002www.ti.comFUNCTIONAL BLOCK DIAGRAMAVDDDVDDREFP3.5 VVREFP1.5 V1.225 VREF2.5 VREFOUTREFMREFINAINPS/HSingleEndedand/orDifferentialMUXVREFMBVDD12 BitPipelineADC12D0D1D2D3D4D5D6D7D8D9D10/RA0D11/RA1BGNDSYNCAGNDDGNDAINMS/H+–BINPS/HBuffersBINMS/HCONV_CLKCS0CS1RDWR (R/W)Logic and ControlControlRegister6http://oneic.com/www.ti.comTHS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002TYPICAL CHARACTERISTICSTOTAL HARMONIC DISTORTIONvsSAMPLING FREQUENCY (SINGLE-ENDED)8075THD – Total Harmonic Distortion – dB7065605550454001234567fs – Sampling Frequency – MHzAVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FSSINAD – Signal-to-Noise and Distortion – dB70SIGNAL-TO-NOISE AND DISTORTIONvsSAMPLING FREQUENCY (SINGLE-ENDED)AVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FS65605550454001234567fs – Sampling Frequency – MHzFigure 1Figure 2SPURIOUS FREE DYNAMIC RANGEvsSAMPLING FREQUENCY (SINGLE-ENDED)90SFDR – Spurious Free Dynamic Range – dB85SNR – Signal-to-Noise – dB80757065605550454001234567fs – Sampling Frequency – MHzAVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FS4006570SIGNAL-TO-NOISEvsSAMPLING FREQUENCY (SINGLE-ENDED)AVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FS605550451234567fs – Sampling Frequency – MHzFigure 3Figure 47http://oneic.com/THS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002www.ti.comTYPICAL CHARACTERISTICSTOTAL HARMONIC DISTORTIONvsSAMPLING FREQUENCY (DIFFERENTIAL)85SINAD – Signal-to-Noise and Distortion – dB80THD – Total Harmonic Distortion – dB757065605550454001234567fs – Sampling Frequency – MHzAVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FS8075706560555045400SIGNAL-TO-NOISE AND DISTORTIONvsSAMPLING FREQUENCY (DIFFERENTIAL)AVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FS1234567fs – Sampling Frequency – MHzFigure 5Figure 6SPURIOUS FREE DYNAMIC RANGEvsSAMPLING FREQUENCY (DIFFERENTIAL)100SFDR – Spurious Free Dynamic Range – dB95908580757065605550454001234567fs – Sampling Frequency – MHz400AVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FSSNR – Signal-to-Noise – dB8075706560555045SIGNAL-TO-NOISEvsSAMPLING FREQUENCY (DIFFERENTIAL)AVDD = 5 V, DVDD = BVDD = 3 V, fIN = 500 kHz, AIN = –0.5 dB FS1234567fs – Sampling Frequency – MHzFigure 7Figure 88http://oneic.com/www.ti.comTHS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002TYPICAL CHARACTERISTICSTOTAL HARMONIC DISTORTIONvsINPUT FREQUENCY (SINGLE-ENDED)85THD – Total Harmonic Distortion – dBSINAD – Signal-to-Noise and Distortion – dB8075706560555045400.0AVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS8075706560555045400.0SIGNAL-TO-NOISE AND DISTORTIONvsINPUT FREQUENCY (SINGLE-ENDED)AVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS0.51.01.52.02.53.00.51.01.52.02.53.0fi – Input Frequency – MHzfi – Input Frequency – MHzFigure 9Figure 10SPURIOUS FREE DYNAMIC RANGEvsINPUT FREQUENCY (SINGLE-ENDED)100SFDR – Spurious Free Dynamic Range – dB9590SNR – Signal-to-Noise – dB858075706560555045400.00.51.01.52.0fi – Input Frequency – MHz2.53.0AVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS8075706560555045400.0SIGNAL-TO-NOISEvsINPUT FREQUENCY (SINGLE-ENDED)AVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS0.51.01.52.02.5fi – Input Frequency – MHz3.0Figure 11Figure 129http://oneic.com/THS1207SLAS284A – AUGUST 2000 – REVISED DECEMBER 2002www.ti.comTYPICAL CHARACTERISTICSTOTAL HARMONIC DISTORTIONvsINPUT FREQUENCY (DIFFERENTIAL)90THD – Total Harmonic Distortion – dB807060504030200.0SINAD – Signal-to-Noise and Distortion – dBAVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS80AVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS70SIGNAL-TO-NOISE AND DISTORTIONvsINPUT FREQUENCY (DIFFERENTIAL)605040300.51.01.52.02.53.03.5200.00.51.01.52.02.53.03.5fi – Input Frequency – MHzfi – Input Frequency – MHzFigure 13SPURIOUS FREE DYNAMIC RANGEvsINPUT FREQUENCY (DIFFERENTIAL)90SFDR – Spurious Free Dynamic Range – dB807060504030200.0SNR – Signal-to-Noise – dB80Figure 14SIGNAL-TO-NOISEvsINPUT FREQUENCY (DIFFERENTIAL)AVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS70605040AVDD = 5 V, DVDD = BVDD = 3 V, fs = 6 MHz, AIN = –0.5 dB FS0.51.01.52.02.53.03.530200.00.51.01.52.02.53.03.5fi – Input Frequency – MHzfi – Input Frequency – MHzFigure 15Figure 1610http://oneic.com/
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