Word line driving circuit and semiconductor memory

专利名称：Word line driving circuit and semiconductor

memory device using the same

发明人：Makoto Yanagisawa,Yukinori Kodama申请号：US08/016613申请日：19930211公开号：US05353257A公开日：19941004

摘要：In a word line driving circuit coupled to a word line of a memory cell array of asemiconductor memory device, a first transistor has a first terminal receiving an inputsignal based on a row address signal applied to the semiconductor memory device, asecond terminal, and a control terminal receiving a first timing signal. A second transistorhaving a first terminal receiving a second timing signal, a second terminal connected tothe word line, and a control terminal connected to the second terminal of the firsttransistor. A third transistor has a first terminal connected to the second terminal of thesecond transistor, a second terminal set at a predetermined potential, and a controlterminal receiving a third timing signal. The first transistor has a threshold voltage lessthan that of at least one of the second and third transistors.

申请人：FUJITSU LIMITED

代理机构：Greer, Burns & Crain, Ltd.

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