FPGA with a plurality of input reference voltage l

专利名称：FPGA with a plurality of input reference

voltage levels grouped into sets

发明人：F. Erich Goetting,Scott O. Frake,Venu M.

Kondapalli,Steven P. Young

申请号：US09569745申请日：20000511公开号：US06204691B1公开日：20010320

专利附图：

摘要：The invention comprises an FPGA having a plurality of input reference voltagesand/or output voltage supplies. In one embodiment, two or more differential amplifiers

in the same configurable input buffer use different input reference voltages. Accordingto a second aspect of the invention, the I/O pad line is configurably connected to theinput reference voltage line, so that any configurable Input/Output Block (IOB) can beused to supply the input reference voltage. According to a third aspect of the invention,the reference input of an I/O is configurably connected to any of two or more inputreference voltage lines. According to another aspect of the invention, a single inputreference voltage and/or a single output voltage supply is applied to each IOB, with theIOBs grouped into sets. Each set of IOBs has a separate input reference voltage and/or aseparate output voltage supply.

申请人：XILINX, INC.

代理人：Lois D. Cartier

更多信息请下载全文后查看