Space-efficient package for laterally conducting d

专利名称：Space-efficient package for laterally

conducting device

发明人：James Harnden,Allen K. Lam,Richard K.

Williams,Anthony Chia,Chu Weibing

申请号：US12075814申请日：20080314公开号：US07667309B2公开日：20100223

专利附图：

摘要：Efficient utilization of space in a laterally-conducting semiconductor devicepackage is enhanced by creating at least one supplemental downbond pad portion of the

diepad for receiving the downbond wire from the ground contact of the device. Thesupplemental diepad portion may occupy area at the end or side of the packageformerly occupied by non-integral leads. By receiving the substrate downbond wire, thesupplemental diepad portion allows a greater area of the main diepad to be occupied bya die having a larger area, thereby enhancing space efficiency of the package.

申请人：James Harnden,Allen K. Lam,Richard K. Williams,Anthony Chia,Chu Weibing

地址：Hollister CA US,Fremont CA US,Cupertino CA US,Singapore SG,Shanghai CN

国籍：US,US,US,SG,CN

代理机构：Townsend and Townsend and Crew LLP

更多信息请下载全文后查看