专利名称:Integration of semiconductor memory cells
and logic cells
发明人:Kimihiko Hosaka,Toro Anezaki申请号:US14458542申请日:20140813公开号:US09343470B2公开日:20160517
专利附图:
摘要:A polysilicon gate electrode is formed in a memory cell area, and a dummypolysilicon gate electrode is formed in a logic cell area of a silicon substrate. The dummypolysilicon gate electrode is removed and a gate insulation film and a metal gate
electrode having a recess portion are formed. Further, contact holes are formed onsource regions and drain regions of the memory cell area and the logic cell area. Therecess portion of the metal gate electrode and the contact holes are filled with a wiringmetal, substantially simultaneously, and thereafter the wiring metal is planarized bypolishing.
申请人:Cypress Semiconductor Corporation
地址:San Jose CA US
国籍:US
更多信息请下载全文后查看
因篇幅问题不能全部显示,请点此查看更多更全内容