专利名称：Semiconductor logic circuits发明人：Mun, Joseph,Phillips, John Alexander申请号：EP81304671.1申请日：19811008公开号：EP0050449A2公开日：19820428
专利附图：
摘要：A velocity saturated pull-up load for a compound semiconductor, e.g. galliumarsenide, logic element comprises a mesa 11 of active material supported on a substrate12 and provided with a pair of closely spaced electrodes 13. The saturation currentcorresponds to the mesa dimensions and the electrode spacing. A logic elementprovided with the velocity saturated load is also described.
申请人：ITT INDUSTRIES INC.,Deutsche ITT Industries GmbH
地址：320 Park Avenue New York, NY 10022 US,Hans-Bunte-Strasse 19 D-79108Freiburg DE
国籍：US,DE
代理机构：Dennis, Mark Charles
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