Hex D-Type Flip-Flop with Master Reset
REJ03D0256–0200Z
(Previous ADE-205-376 (Z))
Rev.2.00Jul.16.2004
Description
The HD74AC174 is a high-speed hex D flip-flop. The device is used primarily as a 6-bit edge-triggered storage register.The information on the D inputs is transferred to storage during the Low-to-High clock transition. The device has aMaster Reset to simultaneously clear all flip-flops.
Features
• Outputs Source/Sink 24 mA• Ordering Information
Part NameHD74AC174FPELHD74AC174RPELPackage TypeSOP-16 pin (JEITA)
Package CodePackage AbbreviationTaping Abbreviation (Quantity)FP-16DAV
FPRPEL (2,000 pcs/reel)EL (2,500 pcs/reel)SOP-16 pin (JEDEC)FP-16DNV
Notes:1.Please consult the sales office for the above package availability.
2.The packages with lead-free pins are distinguished from the conventional products by adding V at the end of
the package code.
Pin Arrangement
MR1Q02D03D14Q15D26Q27GND8(Top view)16VCC15Q514D513D412Q411D310Q39CPRev.2.00, Jul.16.2004, page 1 of 7
HD74AC174
Logic Symbol
D0D1D2CPMRD3D4D5Q0Q1Q2Q3Q4Q5Pin Names
D0 to D5CPMRQ0 to Q5
Data Inputs
Clock Pulse InputMaster Reset InputOutputs
Functional Description
The HD74AC174 consists of six edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP)and Master Reset (MR) are common to all flip-flops. Each D input’s state is transferred to the corresponding flip-flops’s output following the Low-to-High Clock (CP) transition. A Low input to the Master Reset (MR) will force alloutputs Low independent of Clock or Data inputs. The HD74AC174 is useful for applications where the true outputonly is required and the Clock and Master Reset are common to all storage elements.
Truth Table
MRLHHHH:L:X:
High Voltage LevelLow Voltage LevelImmaterial
XInputsCPXHLXDLHLQOutputQL: Low-to-High Transition of Clock
Rev.2.00, Jul.16.2004, page 2 of 7
HD74AC174
Logic Diagram
MRCPD5D4D3D2D1D0DQDQDQDQDQDQCPCDCPCDCPCDCPCDCPCDCPCDQ5Q4Q3Q2Q1Q0Please note that this diagram is provided only for the understanding of logic operations and should not beused to estimate propagation delays.Absolute Maximum Ratings
Item
Supply voltage
DC input diode currentDC input voltageDC output diode currentDC output voltage
DC output source or sink currentDC VCC or ground current per output pinStorage temperature
SymbolVCCIIKVIIOKVOIO
ICC, IGNDTstg
Ratings
–0.5 to 7–20
20
–0.5 to Vcc+0.5–5050
–0.5 to Vcc+0.5±50±50
–65 to +150
UnitVmAmAVmAmAVmAmA°C
ConditionVI = –0.5VVI = Vcc+0.5VVO = –0.5VVO = Vcc+0.5V
Recommended Operating Conditions
Item
Supply voltage
Input and output voltageOperating temperatureInput rise and fall time(except Schmitt inputs)VIN 30% to 70% VCC
SymbolVCCVI, VOTatr, tf
2 to 60 to VCC
–40 to +858
Ratings
VV°Cns/V
VCC = 3.0VVCC = 4.5 VVCC = 5.5 V
Unit
Condition
Rev.2.00, Jul.16.2004, page 3 of 7
HD74AC174
DC Characteristics
Item
Sym-bolVIH
Vcc(V)3.04.55.5
VIL
3.04.55.53.04.55.53.04.5
VOL
5.53.04.55.53.04.5
Input leakagecurrentDynamic outputcurrent*
Quiescent supplycurrent
IINIOLDIOHDICC
5.55.55.55.55.5
min.2.13.153.85———2.94.45.42.583.944.94——————————
Ta = 25°Ctyp.1.52.252.751.502.252.752.994.495.49———0.0020.0010.001———————
max.———0.91.351.65——————0.10.10.10.320.320.32±0.1——8.0
Ta = –40 to+85°Cmin.2.13.153.85———2.94.45.42.483.804.80———————86–75—
max.———0.91.351.65——————0.10.10.10.370.370.37±1.0——80
µAmAmAµAV
VOUT = 0.1 V or VCC –0.1 V
Unit
Condition
Input VoltageV
VOUT = 0.1 V or VCC –0.1 V
Output voltage
VOH
VIN = VIL or VIHIOUT = –50 µAVIN = VIL or VIH
IOH = –12 mAIOH = –24 mAIOH = –24 mA
VIN = VIL or VIHIOUT = 50 µAVIN = VIL or VIH
IOL = 12 mAIOL = 24 mAIOL = 24 mA
VIN = VCC or GNDVOLD = 1.1 VVOHD = 3.85 VVIN = VCC or ground
*Maximum test duration 2.0 ms, one output loaded at a time.
AC Characteristics: HD74AC174
Ta = +25°CCL = 50 pFMinTypMax901001.01.01.01.01.01.0
1001259.06.08.56.09.07.0
——11.58.511.08.011.59.0
Ta = –40°C to +85°C
CL = 50 pFMinMax701001.01.01.01.01.01.0
——12.59.512.09.012.510.5
MHznsnsns
Item
Maximum clockfrequencyPropagation delayCP to Qn
Propagation delayCP to Qn
Propagation delayMR to QnNote:
SymbolfmaxtPLHtPHLtPHL
VCC (V)*13.35.03.35.03.35.03.35.0
Unit
1.Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Rev.2.00, Jul.16.2004, page 4 of 7
HD74AC174
AC Operating Requirements: HD74AC174
Ta = +25°CCL = 50 pF
Item
Setup time, HIGH or LOWDn to CP
Hold time, HIGH or LOWDn to CP
MR pulse width, LOWCP pulse widthRecovery timeMR to CPNote:
SymbolVCC (V)*1Typtsu3.32.5thtwtwtrec
5.0
3.35.03.35.03.35.03.35.02.01.00.51.01.01.01.000Ta = –40°Cto +85°CCL = 50 pF
Unit
nsnsnsnsns
Guaranteed Minimum6.57.05.03.03.05.55.05.55.02.52.05.53.03.07.05.07.05.02.52.01.Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Input capacitance
Power dissipation capacitance
SymbolCINCPD
4.585.0
Typ
pFpF
Unit
VCC = 5.5 VVCC = 5.0 V
Condition
Rev.2.00, Jul.16.2004, page 5 of 7
HD74AC174
Package Dimensions
As of January, 200310.0610.5 Max 1695.5Unit: mm10.80 Max*0.20 ± 0.0582.20 Max7.80+ 0.20– 0.301.151.270.10 ± 0.100˚ – 8˚0.70 ± 0.20*0.40 ± 0.060.150.12 MPackage CodeJEDECJEITAMass (reference value)FP-16DAV—Conforms0.24 g*Ni/Pd/Au platingAs of January, 2003Unit: mm9.910.3 Max1693.9511.270.635 Max8 0.110.14+– 0.041.75 Max*0.20 ± 0.056.10+ 0.10– 0.301.080˚ – 8˚*0.40 ± 0.060.150.25M0.60– 0.20+ 0.67*Ni/Pd/Au platingPackage CodeJEDECJEITAMass (reference value)FP-16DNVConformsConforms0.15 gRev.2.00, Jul.16.2004, page 6 of 7
HD74AC174
As of January, 2003Unit: mm5.005.30 Max1694.401*0.20 ± 0.0580.650.13M0.65 Max*0.15 ± 0.051.06.40 ± 0.200˚ – 8˚0.50 ± 0.101.10 Max0.100.030.07+–0.04*Ni/Pd/Au platingPackage CodeJEDECJEITAMass (reference value)TTP-16DAV——0.05 gRev.2.00, Jul.16.2004, page 7 of 7
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