Dynamic bus sizing of DMA transfers

专利名称：Dynamic bus sizing of DMA transfers发明人：Nader Amini,Bechara F. Boury,Sherwood

Brannon,Ian A. Concilio,Richard G.Hofmann,Terence J. Lohman

申请号：US08/224123申请日：19940406公开号：US05548786A公开日：19960820

摘要：A DMA controller is provided for transferring data between source anddestination devices over an I/O bus. The DMA control circuit includes a bus interface unitfor providing a bus size information at the beginning of each consecutive bus cycle and alook ahead responsive to the bus size information for providing a bus size control signal.A DMA control circuit responsive to the bus size control signal controls the bus widthduring contiguous transfer cycles. By dynamically adjusting the DMA control circuit, backto back data reads and writes may occur with no wait states inserted for generating theterminal count information.

申请人：INTERNATIONAL BUSINESS MACHINES CORPORATION

代理人：Robert S. Babayi

更多信息请下载全文后查看