Wafer level package and methods of fabricating the

专利名称：Wafer level package and methods of

fabricating the same

发明人：Sang-wook Park,Nam-seog Kim,Seung-duk

Baek

申请号：US13037159申请日：20110228公开号：US08779576B2公开日：20140715

专利附图：

摘要：In one embodiment, a wafer level package includes a rerouting pattern formedon a semiconductor substrate and a first encapsulant pattern overlying the rerouting

pattern. The first encapsulant pattern has a via hole to expose a portion of the reroutingpattern. The package additionally includes an external connection terminal formed onthe exposed portion of the rerouting pattern. An upper section of the sidewall and asidewall of the external connection terminal may be separated by a gap distance. Thegap distance may increase toward an upper surface of the encapsulant pattern.

申请人：Sang-wook Park,Nam-seog Kim,Seung-duk Baek

地址：Hwaseong-si KR,Yongin-si KR,Hwaseong-si KR

国籍：KR,KR,KR

代理机构：Renaissance IP Law Group LLP

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